During the company's third-quarter 2024 earnings call, Intel confirmed that its future laptop chips will return to the traditional use of RAM sticks, reversing Lunar Lake's radical...
Panther Lake and Nova Lake laptops will return to traditional RAM sticks
Now that you mention it, I remember reading about that, but completely forgot.
I remembered it as the Riva coming out of nowhere. As the saying goes, first impressions last. And I only learned about NV1 much later.
But the third one stayed up!
👍 😋
But Intel also made the i815 GPU, So Arc isn’t really the first.
Oof, yeah, they actually had another they didn’t release, based off pentium cores with avx512, basically knights landing with software support for graphics.
They were canceling projects like it was going out of style, which is sad, that would have been amazing for Ai.
Yes, there was the Xeon Phi, Knights Landing, with up to 72 cores, and 4 threads per core!
The Knights Landing was put into production though, but it was more a compute unit than a GPU.
I’m not aware they tried to sell it as a GPU too? Although If I recall correctly they made some real time ray tracing demos.
So, trying not to dox myself, I worked with the architect twice.
Knights Ferry was derived directly from Larrabee (GPU), P54Cs with pre-AVX-512, .
KNC was a die shrink with more cores. Both of these were PCIe accelerators only.
KNL had full Airmont Atom cores with smt4, basically meaningful cores with proper AVX-512. Also you could boot them with linux, or as a PCIe accelerator.
KNM jadded ML instructions, basically 8/16bit float and faster SIMD.
They cancelled KNH.
I interviewed some of the actual Larrabee guys, they were wild, there was a lot of talk about dynamic translation, they were trying to do really complex things, but when people talk like that it makes me think they were floundering on the software and just looking for tech magic solutions to fundamental problems.
Intel always dies when the software gets more complex than really simple drivers, it’s their achilles heel.
KNL also had the whole MCDRAM on package for basically HBM bandwidth, but that didn’t actually work very well in practice, again due to software issues (you have to pick where you allocate, and using it as an l4 cache was not always effective).
You are right.
Now that you mention it, I remember reading about that, but completely forgot.
I remembered it as the Riva coming out of nowhere. As the saying goes, first impressions last. And I only learned about NV1 much later.
👍 😋
But Intel also made the i815 GPU, So Arc isn’t really the first.
Oof, yeah, they actually had another they didn’t release, based off pentium cores with avx512, basically knights landing with software support for graphics.
They were canceling projects like it was going out of style, which is sad, that would have been amazing for Ai.
Yes, there was the Xeon Phi, Knights Landing, with up to 72 cores, and 4 threads per core!
The Knights Landing was put into production though, but it was more a compute unit than a GPU.
I’m not aware they tried to sell it as a GPU too? Although If I recall correctly they made some real time ray tracing demos.
So, trying not to dox myself, I worked with the architect twice.
Knights Ferry was derived directly from Larrabee (GPU), P54Cs with pre-AVX-512, .
KNC was a die shrink with more cores. Both of these were PCIe accelerators only.
KNL had full Airmont Atom cores with smt4, basically meaningful cores with proper AVX-512. Also you could boot them with linux, or as a PCIe accelerator.
KNM jadded ML instructions, basically 8/16bit float and faster SIMD.
They cancelled KNH.
I interviewed some of the actual Larrabee guys, they were wild, there was a lot of talk about dynamic translation, they were trying to do really complex things, but when people talk like that it makes me think they were floundering on the software and just looking for tech magic solutions to fundamental problems.
Intel always dies when the software gets more complex than really simple drivers, it’s their achilles heel.
KNL also had the whole MCDRAM on package for basically HBM bandwidth, but that didn’t actually work very well in practice, again due to software issues (you have to pick where you allocate, and using it as an l4 cache was not always effective).